29th-30th JUNE 2027 – LONDON, UK

Gary Gilliland

Gary Gilliland

  • Vice President, Marketing
  • DDC-I Inc, USA

Gary Gilliland is the vice president of Marketing at DDC-I, where he is responsible for all marketing functions with an emphasis on the DO-178C safety-critical Deos real-time operating system. He has over 30 years of experience in development and marketing of hardware and software solutions for embedded systems. He has extensive experience with military and commercial avionics and real-time operating systems. Gary is a graduate of the University of Texas at Arlington, where he earned a degree in Electrical Engineering.

Sessions

  • Standards, Regulations and Mitigation Challenges for Multicore

    Mitigation Challenges for Multicore

    Multicore processors are key to the future of avionics, offering greater performance, reduced SWaP, and support for advanced real-time applications. This session will provide an overview of the certification landscape shaping multicore avionics systems. Gain clarity on evolving standards—DO-178C, DO-254, CAST-32A, and AMC 20-193—and their impact on safety, determinism, and interference mitigation. The discussion aims to highlight regulatory expectations, risk management approaches, and compliance strategies critical to delivering certifiable multicore solutions. Understand the challenges for standards bodies, certification tools, regulators and the supply chain shaping the future of multicore avionics compliance.

  • Open & Modular Architectures

    MOSA for Software Architecture

    Avionics is shifting from monolithic systems to open, modular architectures guided by the Future Airborne Capability Environment (FACE) standard. FACE defines common interfaces and data models to enable software portability, reuse, and faster integration across airborne platforms—principles now embedded in UK programmes such as PYRAMID and Team Tempest. While shared compute and software-defined functionality increase flexibility, they also raise challenges in interface control, integration testing, and verification across heterogeneous processors (GPUs, FPGAs, AI accelerators). Emerging technologies like Time-Sensitive Networking (TSN) and FACE I/O Services support deterministic, certifiable communications. This session examines how adopting FACE-aligned open standards delivers technical interoperability, reduced lifecycle cost, and accelerated capability delivery for both industry and government programmes.